# Duart

## Definitions
### Duart
#### vasm
```asm

```
#### gcc
```c
/* Duart Register Base Addresses */
#define duart_base ((volatile uint8_t*) 0xad0001)

#define duart_mr1a          ((volatile uint8_t*) duart_base)
#define duart_mr2a          ((volatile uint8_t*) duart_base)
#define duart_sra           ((volatile uint8_t*) duart_base+2)
#define duart_csra          ((volatile uint8_t*) duart_base+2)
#define duart_cra           ((volatile uint8_t*) duart_base+4)
#define duart_rba           ((volatile uint8_t*) duart_base+6)
#define duart_tba           ((volatile uint8_t*) duart_base+6)
#define duart_ipcr          ((volatile uint8_t*) duart_base+8)
#define duart_acr           ((volatile uint8_t*) duart_base+8)
#define duart_isr           ((volatile uint8_t*) duart_base+10)
#define duart_imr           ((volatile uint8_t*) duart_base+10)
#define duart_cur           ((volatile uint8_t*) duart_base+12)
#define duart_ctur          ((volatile uint8_t*) duart_base+12)
#define duart_clr           ((volatile uint8_t*) duart_base+14)
#define duart_ctlr          ((volatile uint8_t*) duart_base+14)
#define duart_mr1b          ((volatile uint8_t*) duart_base+16)
#define duart_mr2b          ((volatile uint8_t*) duart_base+16)
#define duart_srb           ((volatile uint8_t*) duart_base+18)
#define duart_csrb          ((volatile uint8_t*) duart_base+18)
#define duart_crb           ((volatile uint8_t*) duart_base+20)
#define duart_rbb           ((volatile uint8_t*) duart_base+22)
#define duart_tbb           ((volatile uint8_t*) duart_base+22)
#define duart_ivr           ((volatile uint8_t*) duart_base+24)
#define duart_opcr          ((volatile uint8_t*) duart_base+26)
#define duart_start_counter ((volatile uint8_t*) duart_base+28)
#define duart_opr_set       ((volatile uint8_t*) duart_base+28)
#define duart_stop_counter  ((volatile uint8_t*) duart_base+30)
#define duart_opr_reset     ((volatile uint8_t*) duart_base+30)

/* Status Register A and B */
#define SR_RXRDY 0x01
#define SR_RX_READY 0x01
#define SR_TXRDY 0x04
#define SR_TX_READY 0x04
#define SR_TX_EMPTY 0x08

/* Command Register A and B */
#define CR_NOP          0x00
#define CR_RESET_MR_PTR 0x10
#define CR_RESET_RX     0x20
#define CR_RESET_TX     0x30
#define CR_RESET_ERROR  0x40
#define CR_RESET_BREAK  0x50
#define CR_START_BREAK  0x60
#define CR_STOP_BREAK   0x70
#define CR_SET_EXT_RX   0x80
#define CR_CLEAR_EXT_RX 0x90
#define CR_SET_EXT_TX   0xa0
#define CR_CLEAR_EXT_TX 0xb0
#define CR_STANDBY_MODE 0xc0
#define CR_ACTIVE_MODE  0xd0

#define CR_ENABLE_TX    0x04
#define CR_DISABLE_TX   0x08
#define CR_ENABLE_RX    0x01
#define CR_DISABLE_RX   0x02

/* Interrupt Status Register */
#define GLOBAL_ISR_TXRDY_A 0x01
#define GLOBAL_ISR_RXRDY_A 0x02
#define GLOBAL_ISR_TXRDY_B 0x10
#define GLOBAL_ISR_RXRDY_B 0x20

#define ISR_TX_READY    0x01
#define ISR_RX_READY    0x02
```
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9